IEC-63011-1 › Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

IEC-63011-1 - EDITION 1.0 - CURRENT


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IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
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31.200 (Integrated circuits. Microelectronics Including electronic chips, logical and analogue microstructures Microprocessors, see 35.160)

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Document Number

IEC 63011-1 Ed. 1.0 b:2018

Revision Level

EDITION 1.0

Status

Current

Publication Date

Nov. 28, 2018

Committee Number

47A