IEC-60191-6-6 › Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)
IEC-60191-6-6
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1ST EDITION
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CURRENT
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IEC 60191-6-6:2001 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.
To find similar documents by classification:
31.080.01 (Semiconductor devices in general)
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Document Number
IEC 60191-6-6 Ed. 1.0 b:2001
Revision Level
1ST EDITION
Status
Current
Publication Date
March 1, 2001
Committee Number
47D